Recently, computational science has been offered the prospect of vast increases in capability, thanks to a paradigm shift in hardware architectures. The IT industry has sidestepped the bottlenecks it faced (memory, power, complexity) by opting for on-chip parallelism. This brought first the multi-core model, and now promises many-core as the future. In addition, we have a great opportunity in the tremendous computing power of graphics processors (GPUs). With this opportunity, however, comes the challenge of adapting the large toolbox of scientific computing to the unstoppable changes in computer architectures. The latest studies indicate that some algorithms have more potential than others for extracting performance from modern many-core architectures. A difficult task involves reformulating algorithms to adapt to the hardware in a resource-conscious way. This workshop will discuss the algorithms and their formulations for extracting performance of the modern architectures.